Syntax reference

Wire Lang is a declarative language. A .wire document declares components, the nets that connect their terminals, annotations, and render hints — it never contains coordinates. This page documents every statement and lists the full standard component library. The language separates the electrical model (components, terminals, nets) from the drawing; visual wires are renderer output, not source.

Document structure

A Wire file is UTF-8, uses the .wire extension, and contains exactly one document. Every document starts with the schematic document kind, optionally followed by a title and description used for documentation and accessible SVG output. Indentation is for readability only and has no meaning.

schematic
  title "LED current limiting circuit"
  description "A 5V battery drives a red LED through a 220 ohm resistor."

  component BT1 Battery voltage=5V
  component R1 Resistor value=220ohm
  component D1 LED color=red

  net VCC: BT1.+, R1.1
  connect R1.2, D1.A
  net GND: D1.C, BT1.-

  annotation "Current limiting resistor" near R1
  render direction=left-to-right

Components

A component statement declares a component instance. The form is component <ID> <Type> [properties...]. Each instance ID must be unique. Component types and terminal names come from the standard component library (or a local definition).

component R1 Resistor value=220ohm
component D1 LED color=red
component J1 Header pins=[VCC,GND,SDA,SCL]
component U1 IC pins=[1:VCC@left, 2:GND@left, 3:OUT@right, 4:EN@right]

Conventional designator prefixes — R for resistors, D for diodes and LEDs, C for capacitors, and so on — are recommended. A mismatched prefix produces a warning, not an error.

Use IC for chips that need numbered pins. Each entry in its pins=[...] list is number:name@side, where the number and @side (left, right, top, bottom) are optional and an omitted side defaults to left. Connect IC pins by name, e.g. net VCC: U1.VCC, ....

Local component definitions

When you need a part that is not in the standard library, define it locally with a define component ... end block. List its terminals and choose a symbol. A local definition overrides a standard component of the same name within that document.

define component SoilSensor
  terminal VCC
  terminal GND
  terminal AOUT
  terminal DOUT
  symbol module
end

component S1 SoilSensor

Local components without a specialized symbol use symbol module, which renders a generic block with the declared terminals. If a local component reuses a built-in symbol that has semantic roles (such as led with anode and cathode), it must map its terminals to those roles:

define component MyLed
  terminal positive_leg
  terminal negative_leg
  symbol led
    map anode = positive_leg
    map cathode = negative_leg
  end
end

Authoring brand-new symbol artwork (a custom symbol drawing language) is outside the current scope.

Nets

A net is a logical electrical connection joining one or more terminals. Named nets use the form net <NAME>: <terminal>, <terminal>, ..., where each terminal is written as <InstanceID>.<Terminal>.

net VCC: BT1.+, R1.1
net GND: D1.C, BT1.-

Repeated declarations of the same net name merge into one logical net, so you can build a net up incrementally:

net VCC: BT1.+
net VCC: R1.1, C1.1

A terminal assigned to two different nets is a fatal error. A floating net (only one terminal) is allowed but produces a warning.

connect — anonymous nets

When a connection does not need a name, use connect. It creates an anonymous net between the listed terminals. This is the idiomatic way to express "draw a wire from X to Y".

connect R1.2, D1.A

no-connect — intentionally unconnected

Mark a terminal as intentionally unconnected with no-connect. It renders as a small X at the terminal, the standard schematic convention for "this pin is unused on purpose". A terminal cannot be both in a net and no-connect — that is a fatal validation error. Repeating a no-connect for the same terminal produces a warning.

no-connect U1.7

Power nets

Names such as VCC, 5V, 3V3, and GND are conventional power nets. They are not magic globals — they create no hidden connections, and GND does not automatically add a ground-reference symbol. Connect them explicitly like any other net:

component G1 GroundReference
net GND: G1.GND, BT1.-

Nets render as visual wires by default. To render a net as labels instead of continuous wires, add a render hint: render net VCC style=label.

Annotations and comments

A comment starts with //, documents the source, and never appears in the diagram. An annotation is text intentionally drawn in the schematic, placed near a component instance or a named net.

// Source-only comment, never rendered
annotation "Status LED" near D1
annotation "Power rail" near net VCC

Render hints

Render hints guide how the schematic is drawn without changing its electrical meaning. Global hints apply to the whole document; targeted hints apply to a component, a group, or a net.

render direction=left-to-right
render crossings=hop
render layout=bus-rail
render net VCC style=label
render R1 orientation=vertical
render U1 anchor=center
HintValuesStatus
directionleft-to-right, right-to-left, top-to-bottom, bottom-to-topHonored (default left-to-right)
crossingsgap, hopHonored (default gap)
layoutflow, bus-railHonored (default flow)
net stylewire, labelHonored
orientationhorizontal, verticalHonored
sideleft, right, top, bottomAccepted, not yet honored
anchorcenterAccepted, not yet honored

Wire crossings

By default (crossings=gap), wires that cross without a junction dot are simply drawn overlapping. crossings=hop opts in to a small semicircular hop on the horizontal wire at each such crossing.

Layout modes

The default layout is flow: a row of components with per-net rails, following the global direction. render layout=bus-rail redraws the schematic as a block diagram between a top supply rail and a bottom ground rail, color-coding nets by family and bundling grouped signals into bus trunks. Power rails and buses are inferred from net names and connectivity — no extra syntax is needed. Two-terminal parts that hang off one block — LED chains, buttons, a speaker across an amp's outputs — are placed automatically under or beside the pin that feeds them, flipped so their polarity faces the wire. Bus-rail forces hop crossings and a monospace label profile for legibility.

Per-component orientation

A per-component orientation that runs against the flow's natural axis rotates the part 90° — for example, render R1 orientation=vertical draws a vertical resistor in a left-to-right flow.

side and anchor are validated and recorded on the model, but the bundled layout engine does not position by them yet; using one emits a render.not-yet-honored warning so you are not misled. group statements behave the same way (group.not-yet-honored). They are safe to write for forward compatibility; they just have no visual effect yet.

Properties and quantities

Component properties are written as key=value. Supported value kinds are quantities (a number with a unit), strings, booleans, and enums. Unit-bearing values are normalized to quantities in the schematic model while keeping a display label.

value=220ohm
value=220Ω
value=10k
voltage=5V
capacitance=100nF

A missing recommended property (for example, a resistor with no value) produces a warning, not an error. Unknown properties also produce a warning and are preserved in the model for future tooling.

Standard component library

These component types are built in. Terminals are written after the instance ID with a dot, e.g. BT1.+, D1.A, Q1.C. Header and IC terminals come from their pins=[...] list.

TypeTerminalsPropertiesSymbol
Resistor1, 2recommended value (resistance)resistor
Capacitor1, 2recommended capacitancecapacitor
PolarizedCapacitor+, -recommended capacitancepolarized-capacitor
Inductor1, 2recommended inductanceinductor
DiodeA, Cnonediode
LEDA, Coptional color (red, green, blue, yellow, white, amber)led
NPNTransistorC, B, Enonenpn-transistor
PNPTransistorC, B, Enonepnp-transistor
Battery+, -recommended voltagebattery
GroundReferenceGNDnoneground-reference
SPSTSwitch1, 2optional state (open, closed)spst-switch
PushButton1, 2optional normally (open, closed)push-button
Headerfrom pins=[...]recommended pins (pin list)module
FerriteBead1, 2noneferrite-bead
TVSDiodeA, Coptional bidirectional (boolean)tvs-diode
Speaker+, -nonespeaker
Antenna1noneantenna
TestPoint1optional nametest-point
PTC1, 2noneptc
PowerFlag1recommended name (rail label)power-flag
ICfrom pins=[...]recommended pins (IC pin list)ic

PTC is the resettable-fuse / polyfuse variant. PowerFlag draws its name (e.g. 5V, 3V3, VBAT) as a rail flag and is not a hidden global net.

Standard symbols follow an IEC-style visual profile where practical, with original open-source artwork. Wire Lang does not claim formal IEC 60617 or IEEE 315 compliance. MOSFETs, op-amps, relays, motors, displays, sensors, and complex board modules such as Arduino or ESP32 are outside the current standard library; use IC with named pins for chips, or model other parts as local module-style components with define component.